1. Field of the Disclosure
This invention relates generally to electronic devices, particularly electronic devices having gate dielectric layers that are partially etched.
2. Description of the Related Art
Electronic components in electronic devices continue to decrease in size, while the density of components increases. In particular, the processing requirements for forming such electronic devices is becoming more involved. Electronic devices have transistors and each type of transistor may include different gate dielectric layers. The type of gate dielectric layer may be determined by calculating the necessary capacitance of a region. Varying the thickness of the gate dielectric layer, varying the type of gate dielectric material, or combination thereof is a typical method of controlling the capacitance of a region.
Typically, when forming electronic components, particularly gate structures, a form-mask-etch process sequence is repeated for gate dielectric layers. The effect of the form-mask-etch process is to effectively form different gate dielectric layers of different thicknesses where each gate dielectric layer is separately formed during differential growth or deposition cycles. However, the repetition of the process exposes the substrate surface to chemicals that roughen the surface of the substrate.
The surface roughening of the substrate, which can result from the repetitious form-mask-etch process sequence may cause locations of high electrical field and non-uniform gate dielectric thickness. The effect of which is increased likelihood that the electronic device will have a region of failure and degradation of the overall device. Moreover, processes that require many forming steps are more expensive and increase manufacturing costs of the device. Therefore, the longer and the more involved the process, the more likely the processing will degrade the components quality while increasing the prices to manufacture.